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MRF89XA
2.16
2.16.1
Receiver Configuration Registers
FILTER CONFIGURATION
REGISTER DETAILS
REGISTER 2-17:
FILCREG: FILTER CONFIGURATION REGISTER (ADDRESS:0x10) (POR:0xA3)
R/W-1
R/W-0
R/W-1
R/W-0
R/W-0
R/W-0
R/W-1
R/W-1
bit 7
PASFILV<3:0>
BUTFILV<3:0>
bit 0
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
r = Reserved
bit 7-4
bit 3-0
PASFILV<3:0>: Passive Filter Value bits
These bits indicate the typical single sideband bandwidth of the passive low-pass filter.
1111 = 987 kHz
1110 = 676 kHz
1101 = 514 kHz
1100 = 458 kHz
1011 = 414 kHz
1010 = 378 kHz (default)
1001 = 321 kHz
1000 = 262 kHz
0111 = 234 kHz
0110 = 211 kHz
0101 = 184 kHz
0100 = 157 kHz
0011 = 137 kHz
0010 = 109 kHz
0001 = 82 kHz
0000 = 65 kHz
BUTFILV<3:0>: Butterworth Filter Value bits
These bits set the receiver bandwidth both in FSK and OOK mode.
f c = f o + 200 kHz ? ? ? ? ? ? ? ? ?
f xtal MHz ? 1 + val ( BUTFILV )
BUTFILV<3:0> = 0011
f c – f o = 100 kHz (default)
----------------------- ------------------------------------------------
12.8 MHz 8
Where,
BUTFILV <3:0> is the value in the register
f c is the cut-off frequency
f o is the local oscillator frequency (center frequency)
f xtal is the crystal oscillator frequency
Note:
f c – f o = 100 kHz only when f xtal = 12.8 MHz.
DS70622C-page 42
Preliminary
? 2010–2011 Microchip Technology Inc.
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